Evolved from the original Berkeley Emulation Engine (BEE), BEE3 is the third generation commercial FPGA based computer system. BEE3 targets a wide range of application domains, including:

• System emulation and simulation acceleration of multi-processor computer systems
• FPGA based computational acceleration in HPC
• High performance digital signal processing
• ASIC/SoC real-time emulation
• DSP/Communication algorithm real-time prototyping

Jointly developed by Microsoft Research, UC Berkeley, and BEEcube Inc., the BEE3 system design draws from lessons learned in previous generations and from the over 40 years of design experience of the legendary computer architect Chuck Thacker, BEE3's chief designer.

Using the state-of-art Xilinx 65nm FPGA family, each 2U rack mount BEE3 module consists of four large Virtex-5 LXT/SXT/FXT FPGA chips, along with up to 64GB DDR2 DRAM and eight 10GigE interfaces for inter-module communication. In addition, up to 4 PCI Express x8 connections allow a maximum of 16GB per second full-duplex data communication between each BEE3 module and computer host servers. At a power consumption of less than 400 watts, each BEE3 module can provide over 4 trillion integer operations per second, or emulate over 64 RISC processor cores concurrently at a 100 MHz rate.

Each of the four FPGAs provide:

• Dual channel DDR2-400/533/667 RDIMMs, two DIMMs per channel
• Maximum of 4GB DRAM capacity per DIMM, 16GB total per FPGA
• Dual 10GBase-CX4 Ethernet interface
• A single PCI-Express x8 end-point slot
• Direct 40 LVDS high-speed connection to external multi-GHz analog converter devices, such as ADC and DAC
• A number of system management components including Gigabit Ethernet (GigE), RTC/EEPROM, RS232 serial port, and SD Card